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Simulation

Prerequisites:

  • A simulatable schematic & netlist

Tools:

  • Analog or mixed signal simulator (Spice or Verilog-A)

Next Step:

As soon as parts of your schematic begin to solidify you can begin doing simulations.

Commonly used as a way to test analog or mixed-signal design concepts, simulation is the practice of modelling a circuit with known electronics physics properties and graphing the response curves. It’s very common to simulate audio, power and semiconductor transistor circuits prior to fabrication. It provides a cost and time effective way of justifying a prototyping run, or forcing the designer back to the drawing board.

To run a simulation you will need to generate two things: A circuit netlist, and a collection of part models. The netlist describes the way all of your parts are connected. And the models use phyics formulas to describe how the parts function. Most EDA tools will allow you to export your schematic as a spice netlist (spice is a specific type of simulator). You will then need to begin the arduous process of connecting your netlist to a model library, and running a simulation. In most simulators this will give you back a 2D plot of the response of your circuit.

Some of the newer and better EDA tools have simulators and models built right in, which means less pain exporting your circuit and less pain finding and associating models with parts. We highly recommend using one of these all-in-one simulators if possible.

The output of your simulations will be graphs. It could be voltage vs. time, or voltage vs. frequency, or any of a number of other simulation types. But the point is you are generating graphs which you will then need to compare to either a known graphed wave form of good quality, or to your understanding of how the circuit should respond. Either way, given the simulation plots and some time understanding what they mean you should be able to give your test circuit a pass or a fail.

Once you have graphed the responses to the impulses you were interested in you can either move back into schematic capture to fix the bugs or move on to PCB layout to produce a prototype for further verification.

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