Texas Instruments AM4376BZDN100

Reference Designs (4)

Attributes

Part Number
Manufacturer
Description
Datasheet
Prefix
U
Centroid Not Specified
Digikey Description
ARM® Cortex®-A9 Microprocessor IC Sitara™ 1 Core, 32-Bit 1.0GHz 491-NFBGA (17x17)
Digikey Part Number
296-42747-ND
Lead Free
yes
Mfg Package Ident
ZDN (S-PBGA-N491)
Mouser Part Number
595-AM4376BZDN100
Package
NFBGA491
RoHS
yes
Temperature Range High
+90°C
Temperature Range Low
0°C
Verified Attributes
true
Verified Geometry
true
Verified Pad Assignment
true
Verified Pin Names
true
Voltage

Pins

G24
ECAP0_IN_PWM0_OUT
G25
EXTINTN
G22
WARMRSTN
G20
GPIO5_10
G21
USB0_DRVVBUS
G6
VDDS
G5
VDDS_PLL_DDR
G4
DDR_D4
G3
DDR_D5
G2
DDR_D6
G1
DDR_D7
G8
GPMC_A10
Y19
VDDS
Y18
CAM0_DATA2
Y15
ADC1_AIN5
Y16
VDDA_ADC1
Y10
RESERVED
Y13
ADC0_AIN2
Y12
ADC0_AIN1
B25
XTALOUT
B24
VSS_OSC
B23
DSS_VSYNC
B22
DSS_DATA0
B21
DSS_DATA2
B20
DSS_DATA5
J25
UART0_RTSN
J24
UART0_TXD
M5
DDR_CSN0
M4
DDR_CSN1
M7
VDDS_DDR
M6
DDR_A10
M1
DDR_NCK
M3
DDR_CKE0
M2
DDR_CK
M9
VDD_CORE
M8
VDDS_DDR
P10
VSS
P11
VSS
P12
VSS
P13
VSS
P14
VSS
P15
VSS
P16
VDD_CORE
P17
VDD_CORE
P18
VDDSHV3
P19
VDDS
H18
VSS
H19
RESERVED
M24
MCASP0_AHCLKR
M25
MCASP0_AXR1
H12
VDDS
H13
VDD_MPU
H14
VDD_MPU
H15
VSS
H16
VDD_MPU
H17
VDDSHV6
U24
USB0_ID
U25
USB1_ID
U20
VDDA3P3V_USB1
U21
VDDA1P8V_USB1
U22
USB1_CE
U23
USB0_VBUS
AA23
VSS
AA24
TDO
AA25
TCK
W24
USB0_DM
W25
USB0_DP
W22
USB0_CE
W23
VSSA_USB
W20
VDDA3P3V_USB0
W21
VDDA1P8V_USB0
E24
GPIO5_13
E25
GPIO5_12
E23
VDDS_CLKOUT
AC20
CAM0_PCLK
H9
VDDSHV11
G17
VDDSHV6
G16
VDDSHV6
G14
VDDSHV8
G13
VDDSHV8
G11
VDDSHV9
G10
VDDSHV10
F1
DDR_DQSN0
F2
DDR_DQS0
F3
DDR_D3
F4
DDR_DQM0
F6
GPMC_A7
F7
GPMC_A8
F8
VDDS3P3V_IOLDO
AB1
DDR_D29
AB2
DDR_D28
AB6
RESERVED
AB7
RESERVED
AB9
RESERVED
L2
DDR_A2
L1
DDR_A1
L8
VSS
L9
VSS
Y1
DDR_DQM3
Y3
DDR_D25
Y2
DDR_D24
Y4
DDR_D26
Y7
RESERVED
Y6
RESERVED
R4
DDR_A6
R5
DDR_A5
R6
VDDS_DDR
R7
VDDS_DDR
R1
DDR_A9
R2
DDR_A8
R3
DDR_A7
R8
VDDS_DDR
R9
VDD_CORE
U19
VSS
W18
VDDSHV3
W16
VDDSHV2
W15
VDDS
W13
VDD_CORE
W12
VDD_CORE
W10
RESERVED
U13
VSS
U12
VSS
E8
GPMC_A6
E7
GPMC_A5
E1
DDR_D2
E3
DDR_D0
E2
DDR_D1
F19
CAP_VBB_MPU
F13
VDDS_SRAM_CORE_BG
F10
GPMC_CSN2
F11
GPMC_AD10
F16
VDDSHV7
F17
MII1_RXD0
F14
VDDS_SRAM_MPU_BB
N12
VSS
N13
VSS
N10
VSS
N11
VSS
N16
VDD_CORE
N17
VDD_CORE
N14
VSS
N15
VSS
N18
VDDSHV3
N19
VDDSHV3
P25
SPI4_SCLK
P24
SPI4_D1
P21
RESERVED
P20
SPI2_D1
P23
SPI0_SCLK
P22
SPI2_D0
H25
UART3_RXD
H24
UART3_TXD
H21
RESERVED
H20
CLKREQ
H23
MCASP0_AXR0
H22
UART3_CTSN
K3
DDR_BA2
K2
DDR_BA1
K1
DDR_BA0
K7
VDDS_DDR
K6
DDR_D13
K5
DDR_D14
K4
DDR_D15
U11
VSS
U10
VSS
K9
VSS
K8
VDDS_DDR
U15
VDD_CORE
U14
VSS
U17
VSS
U16
VSS
AB25
CAM1_WEN
AB24
I2C0_SDA
AB20
CAM1_DATA0
M11
VSS
M10
VSS
M13
VSS
M12
VDD_CORE
M15
VSS
M14
VDD_CORE
M17
VDD_MPU
M16
VSS
M18
VDD_MPU
E19
DSS_DATA7
E11
GPMC_AD12
E10
GPMC_OEN_REN
E13
CAP_VDD_SRAM_CORE
E14
CAP_VDD_SRAM_MPU
E17
VDDS_PLL_MPU
E16
MII1_RXD2
K22
UART1_CTSN
K23
MCASP0_FSR
K20
VDD_MPU
K21
UART1_RXD
K24
UART3_RTSN
K25
UART0_RXD
U18
VSS
V18
VSS
V12
VSS
V13
VSS
V10
VSS
V11
VSS
V16
VDDSHV2
V17
VDDSHV2
V14
VSS
V15
VDD_CORE
AA7
RESERVED
AA1
DDR_DQS3
D8
GPMC_A11
AA2
DDR_DQSN3
D6
CAP_VDDS1P8V_IOLDO
D7
GPMC_A4
D2
MMC0_CMD
D1
MMC0_CLK
F23
GPIO5_11
F22
VDDSHV5
F20
VDDS
F25
USB1_DRVVBUS
F24
GPIO5_9
N23
EMU0
N22
MCASP0_FSX
N21
VDDS_PLL_CORE_LCD
N20
SPI2_SCLK
N25
SPI4_CS0
N24
MCASP0_ACLKX
C23
VDDS_OSC
C20
DSS_DATA6
C21
DSS_DATA3
C24
XDMA_EVENT_INTR1
C25
XTALIN
J8
VDDSHV1
J9
VSS
J4
DDR_D11
J5
DDR_D10
J6
DDR_D9
J7
VDDSHV1
J1
DDR_DQSN1
J2
DDR_DQS1
J3
DDR_D12
W6
DDR_D23
W5
DDR_D22
W4
DDR_D21
W2
DDR_DQSN2
W1
DDR_DQS2
L18
VSS
L19
VDD_MPU
L14
VDD_CORE
L15
VSS
L17
VSS
L11
VSS
L12
VDD_CORE
T14
VDD_CORE
T15
VSS
T17
VSS
T11
VDD_CORE
T12
VSS
T18
VDD_CORE
T19
VDD_CORE
AC16
ADC1_AIN0
AC15
VSSA_ADC
AC13
ADC0_AIN5
AC12
RESERVED
AC10
RESERVED
AC18
CAM0_FIELD
H10
VDDSHV10
H11
VDDSHV9
P2
DDR_A3
P1
DDR_A4
P8
VSS
P9
VSS
AE1
VSS
AE3
RTC_WAKEUP
AE2
RTC_KALDO_ENN
AE5
RTC_XTALIN
AE4
RTC_XTALOUT
AE7
VSS
AE6
RTC_PWRONRSTN
AE9
RESERVED
AE8
VSS
K11
VSS
AD21
CAM1_DATA2
AD20
CAM0_DATA7
AD23
CAM1_DATA6
AD22
CAM1_DATA4
D10
GPMC_WEN
D11
GPMC_AD11
K15
VSS
D13
MII1_RX_CLK
K19
VDD_MPU
K18
VDDSHV3
D19
DSS_DATA13
K17
VDDSHV3
V24
USB1_DP
C8
GPMC_AD6
C3
GPMC_A0
C2
MMC0_DAT1
C1
MMC0_DAT0
C6
GPMC_A2
C5
GPMC_A1
AE19
CAM0_DATA4
AE18
CAM0_DATA0
AE15
ADC1_VREFP
AE14
ADC0_VREFN
AE17
CAM0_HD
AE16
ADC1_AIN6
AE11
RESERVED
AE10
VSS
AE13
ADC0_AIN7
AE12
RESERVED
A20
DSS_DATA4
A21
DSS_DATA1
A22
DSS_PCLK
A23
DSS_HSYNC
A24
DSS_AC_BIAS_EN
A25
VSS
C19
DSS_DATA12
C13
MII1_TXD2
C11
GPMC_AD13
C10
GPMC_BE0N_CLE
C17
DSS_DATA14
C16
MII1_TXD3
C14
MII1_RXD3
AB12
VDDA_ADC0
AB13
ADC0_AIN4
AB10
RESERVED
AB16
ADC1_AIN1
AB15
ADC1_AIN3
AB18
CAM0_DATA1
AB19
CAM0_DATA8
V1
DDR_D20
V2
DDR_D19
V3
DDR_D18
V4
DDR_D17
V5
DDR_D16
V6
DDR_DQM2
V7
VDDS_DDR
V8
VDDS_DDR
V9
VSS
D14
MII1_TX_CLK
K12
VSS
D16
MII1_COL
D17
DSS_DATA15
Y20
TDI
AD25
CAM1_HD
Y22
I2C0_SCL
Y23
PWRONRSTN
Y24
TMS
Y25
NTRST
AD24
CAM1_DATA8
K14
VSS
AD18
CAM0_VD
AD19
CAM0_DATA5
AD10
RESERVED
AD11
RESERVED
AD12
VDDS
AD13
ADC0_AIN6
AD14
ADC0_VREFP
AD15
ADC1_VREFN
AD16
ADC1_AIN7
AD17
CAM0_WEN
B4
GPMC_A9
B5
GPMC_AD0
B6
GPMC_AD2
B7
GPMC_AD4
B1
MMC0_DAT3
B2
MMC0_DAT2
B3
GPMC_WPN
B8
GPMC_AD7
B9
GPMC_CSN1
U9
VSS
U8
VSS
U1
DDR_ODT0
U2
DDR_ODT1
AE24
CAM1_DATA7
AE25
VSS
AE20
CAM0_DATA6
AE21
CAM1_PCLK
AE22
CAM1_DATA3
AE23
CAM1_DATA5
R17
VSS
R14
VDD_CORE
R15
VSS
R12
VSS
R11
VDD_CORE
R18
VSS
T21
SPI0_D1
T20
SPI0_CS0
T23
SPI2_CS0
T22
SPI0_D0
T25
USB1_VBUS
T24
EMU1
AC23
CAM1_VD
H8
VDDSHV11
AC21
CAM1_DATA1
V25
USB1_DM
AC24
CAM1_DATA9
AC25
CAM1_FIELD
H2
DDR_DQM1
H1
DDR_D8
B16
MII1_RXD1
B17
MDIO_CLK
B14
MII1_CRS
B15
MII1_TXD0
B12
GPMC_CSN3
B13
MII1_RX_ER
B10
GPMC_AD8
B11
GPMC_AD14
B18
DSS_DATA11
B19
DSS_DATA9
AD6
RTC_PMIC_EN
AD7
RESERVED
AD4
VSS_RTC
AD5
VDDS_RTC
AD2
RESERVED
AD3
CAP_VDD_RTC
AD1
RESERVED
AD8
VDDS
AD9
VDD_CORE
L21
UART1_TXD
L20
VDD_MPU
L23
MCASP0_ACLKR
L22
UART1_RTSN
L25
UART0_CTSN
L24
MCASP0_AHCLKX
J18
VDDSHV3
J16
VDD_MPU
J17
VSS
J14
VDD_MPU
J15
VSS
J12
VSS
J13
VDD_MPU
J10
VDD_CORE
J11
VDD_CORE
D20
VDD_MPU_MON
D25
GPIO5_8
D24
XDMA_EVENT_INTR0
N8
VDDS_DDR
N9
VDD_CORE
N1
DDR_A0
N2
DDR_RASN
N3
DDR_CASN
N4
DDR_WEN
N5
DDR_A13
N6
DDR_CKE1
N7
VDDS_DDR
AC3
DDR_VTP
AC2
DDR_D31
AC1
DDR_D30
AC7
RESERVED
AC6
RESERVED
AC5
RESERVED
AC9
RESERVED
AA10
RESERVED
AA13
ADC0_AIN3
AA15
ADC1_AIN4
AA16
ADC1_AIN2
AA19
CAM0_DATA9
AA18
CAM0_DATA3
A15
MII1_RX_DV
A14
MII1_TXD1
A17
MDIO_DATA
A16
RMII1_REF_CLK
A11
GPMC_AD15
A10
GPMC_AD9
A13
MII1_TX_EN
A12
GPMC_CLK
A19
DSS_DATA8
A18
DSS_DATA10
A1
VSS
A3
GPMC_BE1N
A2
GPMC_WAIT0
A5
GPMC_AD1
A4
GPMC_A3
A7
GPMC_AD5
A6
GPMC_AD3
A9
GPMC_ADVN_ALE
A8
GPMC_CSN0
AA3
DDR_D27
T8
VDDS_DDR
T9
VDD_CORE
T6
DDR_VREF
T7
VDDS_DDR
T4
DDR_A12
T5
DDR_A11
T2
DDR_A15
T3
DDR_A14
T1
DDR_RESETN
AA9
RESERVED
R25
SPI0_CS1
R24
SPI4_D0
AA12
ADC0_AIN0

Contributors