Texas Instruments SN74CB3Q3244ZQNR

Attributes

Part Number
Imported From Octopart
yes
Manufacturer
Lead Free
Yes
Prefix
U
Description
Standard
Octopart Part Number
e02e2923f06c3fe9
Package
BGA-20
RoHS
Yes
Datasheet
Polarity
Non-Inverting
Supply Voltage Dc
3.3 V
Quiescent Current
700 uA
Lifecycle Status
Active
Mounting Type
surface mount
Output Current
30 mA

Pins

A1
1A1
A2
1!OE
A3
Vcc
A4
2!OE
B1
1A2
B2
2A4
B3
2B4
B4
1B1
C1
1A3
C2
2B3
C3
2A3
C4
1B2
D1
1A4
D2
2A2
D3
2B2
D4
1B3
E1
GND
E2
2B1
E3
2A1
E4
1B4

Pricing

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Supplier Part Number # In Stock 11025100250500  
Newark (USD) 10J9638 0 0.597 Buy Now
Rochester Electronics (USD) SN74CB3Q3244ZQNR 37075 0.650.60.580.55 Buy Now
Avnet Express (USD) SN74CB3Q3244ZQNR 0 Buy Now
Digi-Key (USD) 296-17034-1-ND 1000 1.521.341.20961.05840.92820.8232 Buy Now
Digi-Key (USD) 296-17034-6-ND 1000 1.521.341.20961.05840.92820.8232 Buy Now
Digi-Key (USD) 296-17034-2-ND 0 Buy Now
Mouser (USD) 595-SN74CB3Q3244ZQNR 500 1.461.170.903 Buy Now
Arrow (USD) SN74CB3Q3244ZQNR 0 Buy Now

Contributors

Datasheet Preview

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SCDS154B − OCTOBER 2003 − REVISED DECEMBER 2004
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D High-Bandwidth Data Path
(Up To 500 MHz
)
D 5-V-Tolerant I/Os with Device Powered Up
or Powered Down
D Low and Flat ON-State Resistance (r
on
)
Characteristics Over Operating Range
(r
on
= 4 Typical)
D Rail-to-Rail Switching on Data I/O Ports
− 0- to 5-V Switching With 3.3-V V
CC
− 0- to 3.3-V Switching With 2.5-V V
CC
D Bidirectional Data Flow, With Near-Zero
Propagation Delay
D Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
io(OFF)
= 3.5 pF Typical)
D Fast Switching Frequency
(f
OE
= 20 MHz Max)
For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI
application report, CBT-C, CB3T, and CB3Q
Signal-Switch Families, literature number SCDA008.
D Data and Control Inputs Provide
Undershoot Clamp Diodes
D Low Power Consumption
(I
CC
= 0.7 mA Typical)
D V
CC
Operating Range From 2.3 V to 3.6 V
D Data I/Os Support 0- to 5-V Signaling
Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V,
5 V)
D Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
D I
off
Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
D Supports Both Digital and Analog
Applications: Differential Signal Interface,
Memory Interleaving, Bus Isolation,
Low-Distortion Signal Gating
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
GND
V
CC
2OE
1B1
2A4
1B2
2A3
1B3
2A2
1B4
2A1
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
120
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
2OE
1B1
2A4
1B2
2A3
1B3
2A2
1B4
1A1
2B4
1A2
2B3
1A3
2B2
1A4
2B1
2A1
V
GND
CC
1OE
description/ordering information
The SN74CB3Q3244 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage
of the pass transistor, providing a low and flat ON-state resistance (r
on
). The low and flat ON-state resistance
allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The
device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data
bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3244 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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SCDS154B − OCTOBER 2003 − REVISED DECEMBER 2004
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
The SN74CB3Q3244 is organized as two 4-bit bus switches with separate output-enable (1OE, 2OE) inputs.
It can be used as two 4-bit bus switches or as one 8-bit bus switch. When OE
is low, the associated 4-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When
OE
is high, the associated 4-bit bus switch is OFF, and the high-impedance state exists between the A and B
ports.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE
should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY Tape and reel SN74CB3Q3244RGYR BU244
SOIC − DW
Tube SN74CB3Q3244DW
CB3Q3244
SOIC − DW
Tape and reel SN74CB3Q3244DWR
CB3Q3244
SSOP − DB Tape and reel SN74CB3Q3244DBR BU244
−40°C to 85°C
SSOP (QSOP) − DBQ Tape and reel SN74CB3Q3244DBQR CB3Q3244
−40 C to 85 C
TSSOP − PW
Tube SN74CB3Q3244PW
BU244
TSSOP − PW
Tape and reel SN74CB3Q3244PWR
BU244
TVSOP − DGV Tape and reel SN74CB3Q3244DGVR BU244
VFBGA − GQN Tape and reel SN74CB3Q3244GQNR BU244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
terminal assignments
1234
A 1A1 1OE V
CC
2OE
B 1A2 2A4 2B4 1B1
C 1A3 2B3 2A3 1B2
D 1A4 2A2 2B2 1B3
E GND 2B1 2A1 1B4
FUNCTION TABLE
(each 4-bit bus switch)
INPUT
INPUT/OUTPUT
FUNCTION
INPUT
OE
INPUT/OUTPUT
A
FUNCTION
L B A port = B port
H Z Disconnect
GQN PACKAGE
(TOP VIEW)
1234
A
B
C
D
E
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SCDS154B − OCTOBER 2003 − REVISED DECEMBER 2004
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagram (positive logic)
1A1
SW
1B1
1A4
1OE
SW
1B4
2A1
SW
2B1
2A4
2OE
SW
2B4
2
8
1
11
17
19
18
12
9
3
simplified schematic, each FET switch (SW)
A
EN
B
EN is the internal enable signal applied to the switch.
Charge
Pump
V
CC
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SCDS154B − OCTOBER 2003 − REVISED DECEMBER 2004
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
−0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control input voltage range, V
IN
(see Notes 1 and 2) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switch I/O voltage range, V
I/O
(see Notes 1, 2, and 3) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control input clamp current, I
IK
(V
IN
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O port clamp current, I
I/OK
(V
I/O
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ON-state switch current, I
I/O
(see Note 4) ±64 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND terminals ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 5): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 5): DBQ package 68°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 5): DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 5): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 5): GQN package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 5): PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 6): RGY package 37°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to ground unless otherwise specified.
2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. V
I
and V
O
are used to denote specific conditions for V
I/O
.
4. I
I
and I
O
are used to denote specific conditions for I
I/O
.
5. The package thermal impedance is calculated in accordance with JESD 51-7.
6. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 7)
MIN MAX UNIT
V
CC
Supply voltage 2.3 3.6 V
V
IH
V
CC
= 2.3 V to 2.7 V 1.7 5.5
V
V
IH
High-level control input voltage
V
CC
= 2.7 V to 3.6 V
2 5.5
V
V
IL
V
CC
= 2.3 V to 2.7 V 0 0.7
V
V
IL
Low-level control input voltage
V
CC
= 2.7 V to 3.6 V
0 0.8
V
V
I/O
Data input/output voltage 0 5.5 V
T
A
Operating free-air temperature −40 85 °C
NOTE 7: All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.