Project Description
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Project description
This is a PCB implementation of an NE555P timer chip, designed to have a near 50% duty cycle while performing in Astable Operation.
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Design Files
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Component (5)
Qty
Description
![](https://upverter.com/static/renders/components/ec2/ec2dc1c4debef487_48x48.png)
Resistor
R2
1
Generic Resistor (14.4K)
![](https://upverter.com/static/renders/components/53c/53c67a767b52873e_48x48.png)
Capacitor
C2
1
Generic Capacitor (Non-Polarized) (10uF)
![](https://upverter.com/static/renders/components/237/23761aeb17de6c37_48x48.png)
Resistor
R1
1
Generic Resistor (100)
![](https://upverter.com/static/renders/components/46c/46c20137b52ff083_48x48.png)
NE555P
U1
1
555 Type, Timer/Oscillator (Single) IC 100kHz 8-DIP (0.300", 7.62mm)